1. Field of the Invention
The invention relates to the field of application-specific integrated circuits, or ASICs, and more particularly, to the control of the matching of time constants within such circuits.
2. Description of the Related Art
As is known by those skilled in the art, some application-specific integrated circuits (or ASICs) comprise a first analog stage coupled to a second digital stage.
The first stage notably comprises first (analog) filtering means responsible for carrying out filtering of the high-pass type on the input signal that they receive, so as to deliver an intermediate signal at the output. Since the first filtering means have a first cutoff frequency that is generally situated inside the bandwidth of the input signal, they induce a distortion of the intermediate signal delivered.
The second stage comprises second (digital) filtering means responsible for reducing as far as possible the distortion present in the intermediate signal delivered by the first stage. These second filtering means exhibit a second cutoff frequency that depends on the combination of filtering coefficient values that is used in their configuration.
For the reduction in distortion to be optimum, the first and second cutoff frequencies must be substantially equal. However, this is (very) difficult to achieve in practice.
In addition, the sampling frequency of the second filtering means, and therefore the operating frequency of the ASIC (defined using an oscillator), has a direct influence on the second cutoff frequency to the extent that each variation of the sampling frequency leads to a decrease in the efficiency of the processing of the distortion.